1. Field of Invention
The invention relates to a load driving circuit, and more particularly, to an operational amplifier circuit.
2. Description of Related Art
An operational amplifier plays a significant role in integrated circuit (IC) design and has been extensively applied to high-fidelity stereo equipment, micro-computers, and other electronic devices. Besides, the operational amplifier is able to enhance a driving capability of an output signal to drive a load or the next-stage circuit.
FIG. 1 is a schematic diagram outlining a conventional digitally-controlled analog voltage driving circuit. With reference to FIG. 1, the driving circuit 100 includes a digital-to-analog converter (DAC) 110 and an operational amplifier 120. The DAC 110 receives a digital signal SD, converts the received digital signal SD into an analog signal SA, and outputs the analog signal SA to the operational amplifier 120. Here, the operational amplifier 120 has a negative feedback configuration and a unity gain. When the operational amplifier 120 receives different input voltages, the corresponding output voltages may vary, and the variation speed is the so-called slew rate which is determined by an input stage current and compensation capacitors of the operational amplifier 120.
In particular, when the digitally-controlled analog voltage driving circuit is applied, an output stage circuit of the operational amplifier 120 often includes a plurality of compensation capacitors to stabilize the operational amplifier 120. For instance, the DAC 110 may have two output ranges according to the most significant bits (MSB) of the 8-bit digital signal SD. FIG. 2 is a schematic diagram illustrating comparison between the two output ranges of the DAC 110. With reference to FIG. 2, when the MSB of the digital signal SD is 1 (MSB=1), the corresponding voltage range refers to the high-level output V2 to V3; when the MSB of the digital signal SD is 0 (MSB=0), the corresponding voltage range refers to the low-level output V1 to V2. In compliance with said digital control, two capacitors are often configured within the output stage circuit of the operational amplifier 120, so as to compensate the stability of the operational amplifier 120. Particularly, one of the two capacitors is responsible for compensating the high-level output of the DAC 110, while the other capacitor is responsible for compensating the low-level output of the DAC 110.
In said design, however, the compensation capacitors often occupy an excessively large area of the chip. If the number of the compensation capacitors is reduced to raise the slew rate, the operational amplifier may accordingly oscillate. Hence, how to equip the output stage circuit of the operational amplifier with an appropriate capacitance compensation scheme is one of the leading topics in the pertinent art.